RK3588 PCIE 节点

RK3588 有5个PCIE控制器，IP是一样的，但是通过配置，可以配置成不同的用途：PCIE2.0或者PCIE3.0

以其中一个PCIE2.0为例，设备树节点及其属性信息如下：

pcie2x1l2: pcie@fe190000 {
        compatible = "rockchip,rk3588-pcie", "snps,dw-pcie";
        #address-cells = <3>;
        #size-cells = <2>;
        bus-range = <0x40 0x4f>;  //作为一个RC，其下的PCIE总线号范围为[0x40, 0x4f]
        clocks = <&cru ACLK_PCIE_1L2_MSTR>, <&cru ACLK_PCIE_1L2_SLV>,
                  <&cru ACLK_PCIE_1L2_DBI>, <&cru PCLK_PCIE_1L2>,
                 <&cru CLK_PCIE_AUX4>, <&cru CLK_PCIE1L2_PIPE>;
        clock-names = "aclk_mst", "aclk_slv",
                  "aclk_dbi", "pclk",
                  "aux", "pipe";
        device_type = "pci";
        interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
                      <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
                      <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
                      <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
        interrupt-names = "sys", "pmc", "msg", "legacy", "err";
        #interrupt-cells = <1>;
        interrupt-map-mask = <0 0 0 7>;
        interrupt-map = <0 0 0 1 &pcie2x1l2_intc 0>,
                        <0 0 0 2 &pcie2x1l2_intc 1>,
                        <0 0 0 3 &pcie2x1l2_intc 2>,
                        <0 0 0 4 &pcie2x1l2_intc 3>;
        linux,pci-domain = <4>;
        num-ib-windows = <8>;
        num-ob-windows = <8>;
        num-viewport = <4>;
        max-link-speed = <2>;
        msi-map = <0x4000 &its0 0x4000 0x1000>;
        num-lanes = <1>;
        phys = <&combphy0_ps PHY_TYPE_PCIE>; // 对应的PHY
        phy-names = "pcie-phy";
        /* PCIE地址和CPU地址的转换：属性(32bit) PCI地址(64bit) cpu地址(32/64bit) 长度(64bit)
            属性位域： npt000ss bbbbbbbb dddddfff rrrrrrrr
                n：relocatable region flag (doesn't play a role here)
                p：prefetchable (cacheable) region flag
                t：aliased address flag (doesn't play a role here)
                ss: space code
                    00: configuration space
                    01: I/O space
                    10: 32 bit memory space
                    11: 64 bit memory space
                bbbbbbbb: The PCI bus number
                ddddd: The device number
                fff: The function number. Used for multifunction PCI devices.
                rrrrrrrr: Register number; used for configuration cycles.
        */
        ranges = <0x00000800 0x0 0xf4000000 0x0 0xf4000000 0x0 0x100000
                   0x81000000 0x0 0xf4100000 0x0 0xf4100000 0x0 0x100000
                   0x82000000 0x0 0xf4200000 0x0 0xf4200000 0x0 0xe00000
                   0xc3000000 0xa 0x00000000 0xa 0x00000000 0x0 0x40000000>;
        reg = <0x0 0xfe190000 0x0 0x10000>,
              <0xa 0x41000000 0x0 0x400000>;
        reg-names = "pcie-apb", "pcie-dbi";
        resets = <&cru SRST_PCIE4_POWER_UP>, <&cru SRST_P_PCIE4>;
        reset-names = "pcie", "periph";
        rockchip,pipe-grf = <&php_grf>;
        status = "disabled";

        pcie2x1l2_intc: legacy-interrupt-controller {
            interrupt-controller;
            #address-cells = <0>;
            #interrupt-cells = <1>;
            interrupt-parent = <&gic>;
            interrupts = <GIC_SPI 250 IRQ_TYPE_EDGE_RISING>;
        };
    };

ranges属性

其中最重要的就是位域，通过设备树节点，我们可以看到，定义了4组地址转换关系
第一组：1MB大小的配置空间，PCI总线号0：设备号1：功能号0：寄存器号0
第二组：1MB大小的I/O空间，可重定位
第三组：14MB大小的32位内存空间
第四组：64位内存空间，可重定位，可预取（缓存）

对应的PHY节点的信息：

    combphy0_ps: phy@fee00000 {
        compatible = "rockchip,rk3588-naneng-combphy";
        reg = <0x0 0xfee00000 0x0 0x100>;
        #phy-cells = <1>;
        clocks = <&cru CLK_REF_PIPE_PHY0>, <&cru PCLK_PCIE_COMBO_PIPE_PHY0>,
                 <&cru PCLK_PHP_ROOT>;
        clock-names = "refclk", "apbclk", "phpclk";
        assigned-clocks = <&cru CLK_REF_PIPE_PHY0>;
        assigned-clock-rates = <100000000>;
        resets = <&cru SRST_P_PCIE2_PHY0>, <&cru SRST_REF_PIPE_PHY0>;
        reset-names = "combphy-apb", "combphy";
        rockchip,pipe-grf = <&php_grf>;
        rockchip,pipe-phy-grf = <&pipe_phy0_grf>;
        status = "disabled";
    };